The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 06, 2009
Filed:
Dec. 23, 2005
Applicant:
Tohru Fujita, Kawasaki, JP;
Inventor:
Tohru Fujita, Kawasaki, JP;
Assignee:
Fujitsu Microelectronics Limited, Tokyo, JP;
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8242 (2006.01); H01L 21/20 (2006.01);
U.S. Cl.
CPC ...
Abstract
Provided is a semiconductor device manufacturing method including the steps of: forming an n-type impurity diffusion region by ion-implanting arsenic into a capacitor formation region of a silicon substrate under a condition that a beam current is not less than 1 μA but less than 3 mA; forming a capacitor dielectric film on the capacitor formation region of the silicon substrate; and forming a capacitor upper electrode on the capacitor dielectric film.
Fujita, Tohru. (2009). Semiconductor device manufacturing method (U.S. Patent No. 7598138). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7598138
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile