Identifying a cache way of a cache access request using information from the microtag and from the micro tlb

Abstract

A data processor operable to process data said data processor comprising: a set associative cache divided into a plurality of cache ways and operable to store data processed by said data processor; a buffer operable to store a table comprising a plurality of mappings of pages of virtual addresses to pages of physical addresses for said data processor; a data store comprising a plurality of data entries each operable to store data for identifying an address of a memory location for each of a plurality of recent cache accesses, each of said plurality of data entries comprising a page index indicating a page in an address space, offset data indicating a location within said page and cache way data identifying a cache way of a cache storage location accessed by said cache access; wherein said data processor is operable in response to a cache access request comprising a virtual address indicating a memory location to access said table and said data store to determine whether said cache access request is to one of said plurality of recently accessed cache storage locations and if so to identify a cache way of said cache storage location from data stored in both said data store and said table.