The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 29, 2009
Filed:
Jan. 23, 2008
Jin-soo Park, Yongin-si, KR;
Gun-ok Jung, Yongin-si, KR;
Jin-soo Park, Yongin-si, KR;
Gun-ok Jung, Yongin-si, KR;
Abstract
A clock gated circuit includes a clock signal receiving unit that applies a first voltage to a fighting node when the clock signal is at a first logic; a discharging unit that discharges an electric charge from the fighting node when the clock signal is transitioned from the first logic to a second logic and when the enable signal is activated; a voltage maintaining unit that maintains the fighting node at a power or ground voltage; and an output unit that inverts a logic level of the fighting node to generate the gated clock signal. A blocking unit can be included that blocks a power voltage from being provided to the fighting node by the voltage maintaining unit when discharging. A blocking transistor can be included that prevents unnecessary electric charge from inflowing into the fighting node to reduce power consumption and discharging time.