The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2009

Filed:

Mar. 03, 2008
Applicants:

Manjul Bhushan, Hopewell Junction, NY (US);

Karen M. G. V. Gettings, N. Chelmsford, MA (US);

Wilfried E. Haensch, Somers, NY (US);

Brian L. Ji, Fishkill, NY (US);

Mark B. Ketchen, Hadley, MA (US);

Inventors:

Manjul Bhushan, Hopewell Junction, NY (US);

Karen M. G. V. Gettings, N. Chelmsford, MA (US);

Wilfried E. Haensch, Somers, NY (US);

Brian L. Ji, Fishkill, NY (US);

Mark B. Ketchen, Hadley, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/26 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit device is provided including at least one first array configuration of integrated circuit components comprising a m×n array of FETs, without specified internal connections between the integrated circuit components, wherein m is greater than two. The integrated circuit device further includes at least one second array configuration of integrated circuit components comprising an array of integrated circuit components nominally identical to those of the first array configuration, with specified internal connections between integrated circuit components. A variation coefficient is determined for the integrated circuit components based on a measured specified parameter of the first array configuration and the second array configuration.


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