The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2009

Filed:

Mar. 13, 2006
Applicants:

Chanho Park, Sandy, UT (US);

Joseph A. Yedinak, Mountain Top, PA (US);

Christopher Boguslaw Kocon, Mountain Top, PA (US);

Jason Higgs, Mountain Top, PA (US);

Jaegil Lee, Kyounggi-Do, KR;

Inventors:

Chanho Park, Sandy, UT (US);

Joseph A. Yedinak, Mountain Top, PA (US);

Christopher Boguslaw Kocon, Mountain Top, PA (US);

Jason Higgs, Mountain Top, PA (US);

Jaegil Lee, Kyounggi-Do, KR;

Assignee:

Fairchild Semiconductor Corporation, South Portland, ME (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/93 (2006.01);
U.S. Cl.
CPC ...
Abstract

A charge balance semiconductor power device comprises an active area having strips of p pillars and strips of n pillars arranged in an alternating manner, the strips of p and n pillars extending along a length of the active area. A non-active perimeter region surrounds the active area, and includes at least one p ring surrounding the active area. One end of at last one of the strips of p pillars extending immediately adjacent an edge of the active area terminates at a substantially straight line at which one end of each of the remainder of the strips of p pillars also end. The straight line extends perpendicular to the length of the active area along which the strips of n and p pillars extend.


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