The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 15, 2009
Filed:
Aug. 23, 2006
William Andrew Burkland, Huxley, IA (US);
Adolfo A. Garcia, Santa Clara, CA (US);
William Andrew Burkland, Huxley, IA (US);
Adolfo A. Garcia, Santa Clara, CA (US);
Micrel, Inc., San Jose, CA (US);
Abstract
A power controller system is described herein, where a power-good signal (PWRGD) is asserted followed by a slightly delayed power-good signal (DLY_PWRGD) upon the system powering up. This PWRGD signal indicates that good power is being supplied to the card or other equipment, and the delayed signal tells a system processor that it is now ok to communicate with the card or other equipment. This delay allows the card or other equipment to reach a steady state condition before being declared operational by the power controller. When powering down the equipment, the DLY_PWRGD signal is first deasserted and power is decoupled from the card or other equipment. The PWRGD signal is then deasserted after a short delay. This short delay allows circuitry within the card to be properly shut down by, for example, carrying out a shutdown routine, using stored charge in the card to temporarily power the card. A state machine is used to carry out the four-state power up and power down sequence.