The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 2009

Filed:

Jan. 24, 2005
Applicants:

Henry Kim, San Jose, CA (US);

Bonnie I. Wang, Cupertino, CA (US);

Chiakang Sung, Milpitas, CA (US);

Joseph Huang, San Jose, CA (US);

Inventors:

Henry Kim, San Jose, CA (US);

Bonnie I. Wang, Cupertino, CA (US);

ChiaKang Sung, Milpitas, CA (US);

Joseph Huang, San Jose, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/12 (2006.01); G06F 9/00 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
Abstract

Circuits, methods, and apparatus for deskewing rising and falling edges of a clock signal. One embodiment of the present invention utilizes a delay element in a data path to adjust a data signal such that a clock signal is centered relative to the data. A further embodiment of the present invention recovers a double-data rate signal using two flip-flops, one clocked by clock rising edges, the other clocked by clock falling edges. An additional delay element is inserted in front of one or both flip-flop clock inputs. If two additional delay elements are used, they are independently adjustable such that each edge can be independently adjusted for improved data recovery.


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