The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 2009

Filed:

Oct. 19, 2006
Applicants:

David Glen Edwards, Dallas, TX (US);

Brian Matthew Johnson, Allen, TX (US);

Mark A. Shaw, Sachse, TX (US);

Stuart C. Haden, Lucas, TX (US);

Inventors:

David Glen Edwards, Dallas, TX (US);

Brian Matthew Johnson, Allen, TX (US);

Mark A. Shaw, Sachse, TX (US);

Stuart C. Haden, Lucas, TX (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/0175 (2006.01); H03K 19/094 (2006.01); H03K 19/082 (2006.01);
U.S. Cl.
CPC ...
Abstract

Apparatus for configuring input/output signal levels of interfacing logic circuits operating at different voltage levels comprises: a logic circuit for operating at a first voltage level; a bank of input/output gates coupled to the logic circuit for interfacing input/output signals at a second voltage level, different from the first voltage level, to the logic circuit, the bank of gates including a port for setting the operational voltage level thereof; and a control circuit coupled to the port and governed by a control signal to configure the operational voltage level of the bank of gates to render the logic circuit and the interfacing input/output signals voltage level compatible.


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