The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 15, 2009
Filed:
Apr. 18, 2006
Jason R. Bergendahl, Sunnyvale, CA (US);
Qi Zhang, Milpitas, CA (US);
Jian Tan, Fremont, CA (US);
Matthew H. Klein, Redwood City, CA (US);
Jason R. Bergendahl, Sunnyvale, CA (US);
Qi Zhang, Milpitas, CA (US);
Jian Tan, Fremont, CA (US);
Matthew H. Klein, Redwood City, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
An input/output (I/O) structure includes a delay element usable for the input path, the output path, or both input and output paths in a user design. In a first mode, the delay element is included in the input path. In a second mode, the delay element is included in the output path. In a third mode, the I/O structure includes the delay in both outgoing signal paths and incoming signal paths, e.g., by utilizing an output tristate signal to control the direction of the delay line. When the output buffer is driving, the delay is inserted in the output path. When the output buffer is tristated, the delay is inserted in the input path. Thus, a single delay element is dynamically shared by both input and output signals that use the same I/O pad. In an optional fourth mode, the delay element is bypassed by both input and output signals.