The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 15, 2009
Filed:
Dec. 13, 2005
Kenji Yamada, Hirakata, JP;
Yoshirou Nakata, Souraku-gun, JP;
Kenji Yamada, Hirakata, JP;
Yoshirou Nakata, Souraku-gun, JP;
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Abstract
A probe card for a wafer level test of electrical characteristics of a plurality of semiconductor integrated circuit devices formed on a semiconductor wafer. The card has a thin film with bumps on which a plurality of bumps to be respectively brought into contact with all of inspection electrodes of the semiconductor integrated circuit devices are formed, and which is held on a rigid ceramic ring. An alignment mark constituted by a bump formed simultaneously with the bumps for contact is added to the thin film with bumps. The desired position of the alignment mark relative to the bumps for contact is maintained. Therefore, a change in position accuracy of the bumps for contact can be easily measured by an image processor with reference to the alignment mark. An optimum position for contact between the wafer to be inspected and the inspection electrodes on the wafer can be computed from the measurement result.