The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7589007 B1

PDF
Full Text
Expired
Date of Patent:
Sep. 15, 2009

Filed:

Apr. 22, 2005
Applicants:

Trevor J. Thornton, Fountain Hills, AZ (US);

Michael E. Wood, San Diego, CA (US);

Inventors:

Trevor J. Thornton, Fountain Hills, AZ (US);

Michael E. Wood, San Diego, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit has first and second complementary MOSFETs and first and second complementary MESFETs fabricated on a common substrate. An insulating layer is disposed on the common substrate. The active region uses salicide block oxide layers to align the drain and source regions to the gate. Alternatively, the active region uses poly-silicon separators surrounded by side wall oxide spacers to align the drain and source regions to the gate. The MESFET may have a drift region between the gate terminal and drain region for high voltage applications. A 'T'-shaped metal contact to the gate of the MESFETs reduces the gate length of the device


Find Patent Forward Citations

Thornton, Trevor. (2009). Mesfets integrated with mosfets on common substrate and methods of forming the same (U.S. Patent No. 7589007). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7589007

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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