Cmos integrated circuit for correction of duty cycle of clock signal

Abstract

A CMOS integrated circuit () for correction of the duty cycle of a clock signal has a correction amplifier () to which a clock signal () is applied. The output of correction amplifier () is connected to an output buffer () and to an input of a duty cycle detector (), the output of which is fed back to a control input (VC) of correction amplifier (), thus forming a control loop. The duty cycle detector () comprises a buffer amplifier (), an RC low pass circuit and a second inverter (). A deviation of the duty cycle of the clock signal is detected in the duty cycle detectorand used to correct the duty cycle in the correction amplifier