The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 08, 2009
Filed:
Mar. 25, 2008
Kok Heng Choe, Penang, MY;
Kar Keng Chua, Penang, MY;
Kok Heng Choe, Penang, MY;
Kar Keng Chua, Penang, MY;
Altera Corporation, San Jose, CA (US);
Abstract
A logic module for a structured ASIC is mask-programmable to perform any of a plurality of logic functions or to alternatively function as two static random access memory ('SRAM') cells. Most or all of the circuitry needed to enable the logic module to function as SRAM cells is circuitry that is available for use in logic mode configuration of the module. Similarly, most or all of the logic circuitry of the logic module is put to use to provide the SRAM cells when the module is configured in SRAM mode. The circuitry of the logic module is therefore used very efficiently, whether the module is configured for logic mode or SRAM mode.