The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2009

Filed:

Jun. 16, 2004
Applicants:

Abhay Ramrao Deshmukh, Arlington, TX (US);

Satnam Singh Doad, Fort Collins, CO (US);

Inventors:

Abhay Ramrao Deshmukh, Arlington, TX (US);

Satnam Singh Doad, Fort Collins, CO (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/31 (2006.01); H01L 21/469 (2006.01);
U.S. Cl.
CPC ...
Abstract

A system and method is disclosed for reducing etch sequencing induced downstream dielectric defects produced in a SOG planarization process used in high volume semiconductor manufacturing. Three factors have been identified as causes of the defects. The three factors are: (1) phosphorus-doping in the base dielectric, and (2) using for SOG etchback an etch tool that was last used for a bond pad etch process, and (3) residual metal contaminants in the etch chamber used for the SOG etchback. Elimination of any one of these three factors eliminates the defects.


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