The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 01, 2009
Filed:
Jun. 02, 2006
Applicants:
Tetsuo Kamada, Kanagawa-ken, JP;
Toru Sasaki, Kanagawa-ken, JP;
Hiroshi Shimizu, Kanagawa-ken, JP;
Inventors:
Assignee:
Kabushiki Kaisha Toshiba, Tokyo, JP;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/3183 (2006.01); G01R 31/40 (2006.01);
U.S. Cl.
CPC ...
Abstract
Replaced cell CELLis composed of clock buffer circuit CBand flip-flop circuit FFthat latches data at a falling-down time of a clock signal. Clock buffer circuits CB-CBare cascade-connected to form a clock tree circuit. A scan circuit is composed of scan flip-flop circuits SFF-SFF. Replaced cell CELLis set in place of the last stage neighboring a scan circuit side between the scan circuit and the clock buffer circuits CB-CBto easily optimize timing adjustments and layout design.