The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 01, 2009
Filed:
Jun. 18, 2004
Betty L. Bergman Reuter, Essex Junction, VT (US);
Mitchell R. Dehond, Essex Junction, VT (US);
William C. Leipold, Enosburg Falls, VT (US);
Daniel N. Maynard, Craftsbury Commons, VT (US);
Brian D. Pfeifer, Red Hook, NY (US);
David C. Reynolds, Essex Junction, VT (US);
Reginald B. Wilcox, Jr., Cambridge, VT (US);
Betty L. Bergman Reuter, Essex Junction, VT (US);
Mitchell R. DeHond, Essex Junction, VT (US);
William C. Leipold, Enosburg Falls, VT (US);
Daniel N. Maynard, Craftsbury Commons, VT (US);
Brian D. Pfeifer, Red Hook, NY (US);
David C. Reynolds, Essex Junction, VT (US);
Reginald B. Wilcox, Jr., Cambridge, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A system, method and media for locating and defining process sensitive sites isolated to specific geometries or shape configurations within chip design data. Once a systemic process sensitive site is identified, a 3D design checking deck is coded and executed through a design checker on physical design data. Target match shapes are produced and embedded back into the design data. Pictures, maps and coordinates of process sensitive sites are produced and sent to a website library for reference.