The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 2009

Filed:

Oct. 14, 2005
Applicants:

In-joon Yeo, Suwon-si, KR;

Won-jun Lee, Seoul, KR;

Tae-hyun Kim, Suwon-si, KR;

Ji-hong Kim, Seoul, KR;

Byoung-moon Yoon, Suwon-si, KR;

Inventors:

In-Joon Yeo, Suwon-si, KR;

Won-Jun Lee, Seoul, KR;

Tae-Hyun Kim, Suwon-si, KR;

Ji-Hong Kim, Seoul, KR;

Byoung-Moon Yoon, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of manufacturing a semiconductor device includes forming an insulation pattern over a substrate. The insulation pattern has at least one opening that exposes a surface of the substrate. Then, a first polysilicon layer is formed over the substrates such that the first polysilicon layer fills the opening. The first polysilicon layer also includes a void therein. An upper portion of the first polysilicon layer is removed such that void expands to a recess and the recess is exposed. A second polysilicon layer is formed over the substrate such that the second polysilicon layer fills the recess.


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