The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2009

Filed:

Sep. 27, 2006
Applicants:

Hong-ching Chen, Feng Shan, TW;

Wen-zen Shen, Hsin Chu, TW;

Der-tsuey Shen Wang, Legal Representative, Hsin Chu, TW;

Inventors:

Hong-Ching Chen, Feng Shan, TW;

Wen-Zen Shen, Hsin Chu, TW;

Der-Tsuey Shen Wang, legal representative, Hsin Chu, TW;

Assignee:

MediaTek Inc., Hsin Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/41 (2006.01);
U.S. Cl.
CPC ...
Abstract

An ACS circuit and a Viterbi decoder with the circuit. The Add-Compare-Select (ACS) circuit comprises: two registers for storing two previous candidate state metrics; a first adder for adding the value stored in the first register and a first branch metric to generate a first addition result; a second adder for adding the value stored in the second register and the first branch metric to generate a second addition result; a comparator for comparing the values stored in the first register and the second register to generate a decision bit; and a multiplexer for selecting either the first addition result or the second addition result as a new output candidate state metric according to the decision bit. Due to the parallel processing of the adders and the comparator, the processing speed of a Viterbi decoder with the ACS will be increased.


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