The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 18, 2009

Filed:

Mar. 30, 2007
Applicants:

Shahriar Mostarshed, San Mateo, CA (US);

Michael L. Anderson, San Jose, CA (US);

Inventors:

Shahriar Mostarshed, San Mateo, CA (US);

Michael L. Anderson, San Jose, CA (US);

Assignee:

Qualitau, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A parametric test system is for testing devices in dice in a semiconductor wafer, each die having a plurality of pads for electrically connecting to the device in the die. A tester of the system has a plurality of input/output lines for providing and receiving electrical signals during a device test. Multiplexer circuitry of the test system includes a plurality of networks of automated switches. The multiplexer circuitry is configured to receive electrical signals on the input lines from the tester and to provide the electrical signals to a wafer prober, wherein the multiplexer circuitry is configured to restrict how the electrical signals can be provided to the networks of automated switches. As a result of the multiplexer being configured to restrict how the electrical signals can be provided to the networks of automated switches, the configuration of the networks of automated switches can be simplified.


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