The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 18, 2009

Filed:

Nov. 29, 2005
Applicants:

Masamichi Ishihara, Kitakyushu, JP;

Akira Izumi, Kitakyushu, JP;

Inventors:

Masamichi Ishihara, Kitakyushu, JP;

Akira Izumi, Kitakyushu, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention provides a packaged stacked semiconductor device which includes bumps serving as external electrode terminals, the bumps being provided on both a front surface and a back surface of the device, and which is sacked on another semiconductor device, substrate, or board having electrode terminals so that the bumps are directly and electrically connected to the electrode terminals. The semiconductor device includes a semiconductor substrate having through-electrodes formed therein. The semiconductor device has, on the front surface side of the semiconductor substrate, a wiring layer connected to the through-electrodes, an insulating film formed on the wiring layer, additional wiring formed on the insulating film, post electrodes connected to the wiring, and external connection bumps connected to the post electrodes. The semiconductor device has, on the back surface side of the semiconductor substrate, an insulating film formed so as to cover the back surface of the semiconductor substrate, exclusive of tip end portions of the through-electrodes, wiring which is formed on the insulating film and to which the through-electrodes are connected, and external connection bumps connected to the wiring.


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