The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 04, 2009
Filed:
Nov. 08, 2006
Demetrio Pellicone, 87040 Castrolibero, IT;
Adamo Corsi, 20099 Sesto San Giovanni, IT;
Marco Roveda, 20086 Motta Visconti, IT;
Concetta Di Tuoro, 80040 Pollena Trocchia, IT;
Procolo Carannante, 80078 Pozzuoli, IT;
Gianfranco Ferrante, 80046 San Giorgio a Cremano, IT;
Demetrio Pellicone, 87040 Castrolibero, IT;
Adamo Corsi, 20099 Sesto San Giovanni, IT;
Marco Roveda, 20086 Motta Visconti, IT;
Concetta Di Tuoro, 80040 Pollena Trocchia, IT;
Procolo Carannante, 80078 Pozzuoli, IT;
Gianfranco Ferrante, 80046 San Giorgio a Cremano, IT;
Other;
Abstract
A method of managing fails in a non-volatile memory device including an array of cells grouped in blocks of data storage cells includes defining in the array a first subset of user addressable blocks of cells, and a second subset of redundancy blocks of cells. A third subset of non-user addressable blocks of cells is defined in the array for storing the bad block address table of respective codes in an addressable page of cells of a block of the third subset. Each page of the third subset is associated to a corresponding redundancy block. If during the working life of the memory device a block of cells previously judged good in a test phase becomes failed, each block is marked as bad and the stored table in the random access memory is updated.