The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 28, 2009
Filed:
Jul. 24, 2006
Ki-don Lee, Plano, TX (US);
Young-joon Park, Plano, TX (US);
Ennis Takashi Ogawa, Austin, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A semiconductor deviceincludes a metal lineformed in a first dielectric layer. A capping layeris formed the metal line. A second dielectric layeris formed over the first dielectric layerand the metal line. A first viais formed in the second dielectric layerand in contact with the metal line. A second viais formed in the second dielectric layerand in contact with the metal line, and is positioned a distance away from the first via. An electrically isolated viais formed in the second dielectric layerand in contact with the metal lineand in between the first viaand the second via. A third dielectric layeris formed over the second dielectric layer. First and second trenchesare formed in the third dielectric layerand in contact with the first viaand the second via, respectively. An isolated trenchis formed in the third dielectric layer and in contact with the isolated via. The isolated viamitigates void formation and/or void migration during operation/conduction with electrons traveling from the first trenchto the second trenchvia the metal line