The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 21, 2009
Filed:
Apr. 19, 2005
Vitus J. Leung, Albuquerque, NM (US);
Cynthia A. Phillips, Albuquerque, NM (US);
Michael A. Bender, East Northport, NY (US);
David P. Bunde, Urbana, IL (US);
Vitus J. Leung, Albuquerque, NM (US);
Cynthia A. Phillips, Albuquerque, NM (US);
Michael A. Bender, East Northport, NY (US);
David P. Bunde, Urbana, IL (US);
Sandia Corporation, Albuquerque, NM (US);
Abstract
In a multiple processor computing apparatus, directional routing restrictions and a logical channel construct permit fault tolerant, deadlock-free routing. Processor allocation can be performed by creating a linear ordering of the processors based on routing rules used for routing communications between the processors. The linear ordering can assume a loop configuration, and bin-packing is applied to this loop configuration. The interconnection of the processors can be conceptualized as a generally rectangular 3-dimensional grid, and the MC allocation algorithm is applied with respect to the 3-dimensional grid.