The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 21, 2009
Filed:
Dec. 22, 2006
Kenji Shibata, Aichi-Prefecture, JP;
Masahiko Okura, Aichi-Prefecture, JP;
Kenta Kato, Aichi-Prefecture, JP;
Mitsuhiro Nagao, Aichi-Prefecture, JP;
Stewart Wang, Fremont, CA (US);
Katherine Butler, Sunnyvale, CA (US);
Cheung Nga Tik, Hong Kong, HK;
Kenji Shibata, Aichi-Prefecture, JP;
Masahiko Okura, Aichi-Prefecture, JP;
Kenta Kato, Aichi-Prefecture, JP;
Mitsuhiro Nagao, Aichi-Prefecture, JP;
Stewart Wang, Fremont, CA (US);
Katherine Butler, Sunnyvale, CA (US);
Cheung Nga Tik, Hong Kong, HK;
Spansion LLC, Sunnyvale, CA (US);
Abstract
A semiconductor device includes: memory regions that include non-volatile memory cells; disabling information memory units that correspond to the memory regions, each of the disabling information memory units storing first program disabling information indicating whether programming is to be disabled or enabled in each corresponding memory region; a program disabling information selection circuit that outputs second program disabling information for disabling programming in a corresponding memory region, regardless of the first program disabling information, when programming is disabled collectively in the memory regions in accordance with collective program disabling information indicating whether programming is to be disabled collectively in the memory regions, the program disabling information selection circuit outputting the first program disabling information as the second program disabling information when programming is not collectively disabled; and a program control circuit that disables or enables programming in the corresponding memory region in accordance with the second program disabling information.