The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 21, 2009
Filed:
Feb. 17, 2006
Alain Moriat, Copenhagen, DK;
Alain Moriat, Copenhagen, DK;
National Instruments Corporation, Austin, TX (US);
Abstract
A method for performing a simulation of a system. The system includes an FPGA that is configured to implement simulation logic, such as a generic solver. For example, the FPGA device may implement a generic time domain solver or a generic frequency domain solver. The FPGA device is also configured with information representing a system model of the system under simulation. The system also includes input hardware for providing input signals for the simulation to the FPGA device and output hardware for receiving output signals computed by the simulation from the FPGA device. The system may be reconfigured to simulate different systems by changing the system model, without requiring the simulation logic (e.g., the generic solver) to be changed.