The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 21, 2009

Filed:

Mar. 11, 2004
Applicant:

Steven M. Betker, Shore View, MN (US);

Inventor:

Steven M. Betker, Shore View, MN (US);

Assignee:

QLOGIC, Corporation, Aliso Viejo, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04J 3/14 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and system for processing fibre channel frames is provided. The method includes, assigning a virtual lane for a frame based on a hop count for the frame; determining if the assigned virtual lane has available credit; and transmitting the frame if credit is available. The system includes, a fibre channel fabric switch element including a receive port for receiving fibre channel frames, which includes a look up table to assign a virtual lane based on a hop count of the frame; and a transmit port that receives a primitive with the assigned virtual lane by the receive port and the transmit port includes a credit control module that determines if an assigned virtual lane can transmit a frame based on available credit.


Find Patent Forward Citations

Betker, Steven. (2009). Method and system for reducing deadlock in fibre channel fabrics using virtual lanes (U.S. Patent No. 7564789). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7564789

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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