The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 21, 2009
Filed:
Mar. 26, 2007
Applicants:
Stephan Henzler, München, DE;
Siegmar Köppe, München, DE;
Dominik Lorenz, München, DE;
Inventors:
Assignee:
Infineon Technologies AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03H 11/26 (2006.01);
U.S. Cl.
CPC ...
Abstract
A time delay circuit is disclosed and includes a delay line with a first delay circuit and at least a second delay circuit connected downstream. An interpolation circuit is used to generate intermediate signals derived by delayed successive signals in the delay line.
Henzler, Stephan. (2009). Time delay circuit and time to digital converter (U.S. Patent No. 7564284). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7564284
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile