The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 21, 2009

Filed:

Jan. 18, 2008
Applicants:

Jin Yong Ahn, Daejeon, KR;

Cheol Seong Hwang, Seoul, KR;

Sung Kun Kim, Seoul, KR;

Chang Sup Ryu, Daejeon, KR;

Suk-hyeon Cho, Daejeon, KR;

Ho Sik Jeon, Chungcheongbuk-do, KR;

Inventors:

Jin Yong Ahn, Daejeon, KR;

Cheol Seong Hwang, Seoul, KR;

Sung Kun Kim, Seoul, KR;

Chang Sup Ryu, Daejeon, KR;

Suk-Hyeon Cho, Daejeon, KR;

Ho Sik Jeon, Chungcheongbuk-do, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/00 (2006.01); H05K 3/30 (2006.01); H01L 21/20 (2006.01);
U.S. Cl.
CPC ...
Abstract

A printed circuit board having embedded capacitors includes a double-sided copper-clad laminate including first circuit layers formed in the outer layers thereof, the first circuit layers including bottom electrodes and circuit patterns; dielectric layers formed by depositing alumina films on the first circuit layers by atomic layer deposition; second circuit layers formed on the dielectric layers and including top electrodes and circuit patterns; one-sided copper-clad laminates formed on the second circuit layers; blind via-holes and through-holes formed in predetermined portions of the one-sided copper-clad laminates; and plating layers formed in the blind via-holes and the through-holes. The manufacturing method of the printed circuit board is also disclosed.


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