The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 21, 2009
Filed:
May. 07, 2007
Uming Ko, Plano, TX (US);
Dharin Shah, Bangalore, IN;
Senthil Sundaramoorthy, Bangalore, IN;
Girishankar Gurumurthy, Chennai, IN;
Sumanth Gururajarao, Dallas, TX (US);
Rolf Lagerquist, Richardson, TX (US);
Clive Bittlestone, Allen, TX (US);
Uming Ko, Plano, TX (US);
Dharin Shah, Bangalore, IN;
Senthil Sundaramoorthy, Bangalore, IN;
Girishankar Gurumurthy, Chennai, IN;
Sumanth Gururajarao, Dallas, TX (US);
Rolf Lagerquist, Richardson, TX (US);
Clive Bittlestone, Allen, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
An integrated circuit. The integrated circuit comprises an area having a layout aligned in rows. Each row is definable by a pair of row boundaries. The integrated circuit also comprises a plurality of cells, comprising a first set of cells. Each cell in the first set of cells spans at least two rows and comprises a PMOS transistor having a source/drain region that spans across one of the row boundaries and an NMOS transistor having a source/drain region that spans across one of the row boundaries.