The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 21, 2009
Filed:
Apr. 09, 2007
Hee-ju Shin, Gyeonggi-do, KR;
Jong-chan Shin, Gyeonggi-do, KR;
Soon-oh Park, Gyeonggi-do, KR;
Hyeong-geun an, Gyeonggi-do, KR;
Han-bong Ko, Gyeonggi-do, KR;
Hee-Ju Shin, Gyeonggi-do, KR;
Jong-Chan Shin, Gyeonggi-do, KR;
Soon-Oh Park, Gyeonggi-do, KR;
Hyeong-Geun An, Gyeonggi-do, KR;
Han-Bong Ko, Gyeonggi-do, KR;
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Abstract
In a semiconductor memory device and a method of manufacturing the same, an insulating layer is formed on a substrate having a logic region on which a first pad is provided and a cell region on which a second pad and a lower electrode are subsequently provided. The insulating layer is etched to be a first insulating layer pattern having a first opening exposing the first pad. A first plug is formed in the first opening. The first insulating layer pattern where the first plug is formed is etched to be a second insulating layer pattern having a second opening exposing the lower electrode. A second plug including a phase-changeable material is formed in the second opening. A conductive wire and an upper electrode are formed on the first plug and the second plug, respectively.