The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 14, 2009
Filed:
Oct. 19, 2006
Yoshiharu Kato, Kasugai, JP;
Yoshiharu Kato, Kasugai, JP;
Fujitsu Microelectronics Limited, Tokyo, JP;
Abstract
An object is to provide a semiconductor device in which it is possible to determine whether or not a minute delay time given by a delay circuit is within a specified value or not, and a method of testing the semiconductor device. In response to a data strobe signal TDQS for testing, the delay circuits DCand DCproduce delay data strobe signals IDQSand IDQSdelayed by delay times DTand DT. Outputted as a reverse signal from the inverter INV, is a reverse data strobe signal RIDQSin response to the delay data strobe signal IDQS, and delayed by an allowable delay time IT. Inputted into the NAND gate ND, are the reverse data strobe signal RIDQSand the delay data strobe signal IDQS. When, in comparison with the phase of the delay data strobe signal IDQS, the phase of the delay data strobe signal IDQSis delayed by the allowable delay time IT or more, a pulse signal PLis not outputted from the NAND gate ND.