The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 14, 2009
Filed:
Dec. 28, 2005
Jian-feng Wang, Guangdong, CN;
Jian-jun Zhu, Guangdong, CN;
Liang-yan Dai, Guangdong, CN;
Hong Fu Jin Precision Industry (Shen Zhen) Co., Ltd., Longhua Town, Bao'an District, Shenzhen, Guangdong Province, CN;
Hon Hai Precision Industry Co., Ltd., Tu-Cheng, Taipei Hsien, TW;
Abstract
An apparatus for adjusting a pixel clock frequency based on a phase locked loop (PLL) includes: a pixel clock generator () for generating an actual pixel clock having an actual frequency; a division frequency counter () for dividing the actual pixel clock into several pixel clocks having different frequency ranges by means of multiplying the actual frequency of the actual pixel clock by a multiplier; a reference frequency counter () for dividing the actual pixel clock by means of lowering the actual frequency of the actual pixel clock, and generating a reference frequency; a reactive frequency counter () for dividing the actual pixel clock by means of heightening the actual frequency of the actual pixel clock, and generating a reactive frequency; a PLL circuit () for integrating the reference frequency and the reactive frequency to generate a required pixel clock having a required frequency. A related method is also disclosed.