The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2009

Filed:

Oct. 19, 2005
Applicants:

Jacek Korec, Sunrise, FL (US);

Shuming Xu, Schnecksville, PA (US);

Wenhua Dai, Allentown, PA (US);

Inventors:

Jacek Korec, Sunrise, FL (US);

Shuming Xu, Schnecksville, PA (US);

Wenhua Dai, Allentown, PA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device includes at least one macro-cell device, the macro-cell device comprising a plurality of LDMOS devices. A first conductive layer is formed over the substrate, the first conductive layer providing source and drain contacts for the macro-cell device. A first isolation layer is formed over the first conductive layer and a second conductive layer is formed over the first isolation layer, the second conductive layer forming a drain bus and a source bus, wherein the buses are electrically coupled to the contacts through the first isolation layer. A second isolation layer is formed over the second conductive layer and insulates the source bus from the drain bus. A plurality of conductive bumps are formed over the second isolation layer, at least one of the conductive bumps directly contacting the drain bus and at least one of the conductive bumps directly contacting the source bus through the second isolation layer.


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