The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2009

Filed:

Jul. 26, 2006
Applicants:

Takashi Noguchi, Yongin-si, KR;

Wenxu Xianyu, Suwon-si, KR;

Xiaoxin Zhang, Yongin-si, KR;

Hans S. Cho, Seoul, KR;

Kyung-bae Park, Seoul, KR;

Inventors:

Takashi Noguchi, Yongin-si, KR;

Wenxu Xianyu, Suwon-si, KR;

Xiaoxin Zhang, Yongin-si, KR;

Hans S. Cho, Seoul, KR;

Kyung-bae Park, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/84 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided are a method of forming a single crystalline silicon layer, a structure including the same, and method of fabricating a thin film transistor ('TFT') using the same. The method of forming the single crystalline silicon layer includes forming a silicon nitride layer on a substrate, forming an insulating layer on the silicon nitride layer, forming a hole in the insulating layer to a predetermined dimension, depositing a first silicon layer on an exposed bottom of the hole using a selective deposition process, depositing a second silicon layer on the insulating layer and the first silicon layer formed in the hole, and crystallizing the second silicon layer using a thermal process. In this method, a high-quality single crystalline silicon layer can be obtained.


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