The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 07, 2009
Filed:
Nov. 21, 2005
Method and apparatus for eliminating noise induced errors during test of a programmable logic device
Randy J. Simmons, San Jose, CA (US);
Teymour M. Mansour, Sunnyvale, CA (US);
Randy J. Simmons, San Jose, CA (US);
Teymour M. Mansour, Sunnyvale, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
A method and apparatus for substantially eliminating noise induced errors caused by a premature start-up sequence between configuration of an integrated circuit (IC) and execution of functional test vectors. A noise elimination sequence is executed, whereby the configuration bitstream associated with the IC is scanned for the existence of a start-up sequence. If found, the start-up sequence is stripped from the configuration bitstream and the IC is then configured using the modified configuration bitstream. The input/output (I/O) pins of the IC remain in a deactivated state until a startup sequence is transmitted to the IC via a Joint Test Action Group (JTAG) port of the IC, which then allows IC testing to commence.