The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2009

Filed:

Sep. 01, 2006
Applicants:

Earl W. Mccune, Santa Clara, CA (US);

Bojan Silic, San Jose, CA (US);

Inventors:

Earl W. McCune, Santa Clara, CA (US);

Bojan Silic, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04K 1/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A hybrid modulator apparatus includes a modulator that amplitude modulates a power supply signal. A correction circuit coupled in parallel with the modulator reduces errors caused by the modulator. In one embodiment the modulator includes a digital pulse-width modulator (PWM) and a buck converter. The K most significant bits (MSBs) of N-bit input digital words are used by the digital PWM and a buck converter to generate an amplitude modulated power supply signal having a plurality of quantized voltage levels. The remaining N−K bits of each N-bit words may be used to dither the input drive to the PMW, to produce an error signal at the output of the modulator representing quantization errors caused by only applying the K MSBs to the PWM. The correction circuit compares the error signal to a signal formed form all N bits of the N-bit words in reducing the quantization errors.


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