The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2009

Filed:

Oct. 28, 2004
Applicants:

Hifumi Noto, Tokyo, JP;

Kazuhisa Yamauchi, Tokyo, JP;

Yoshihiro Hamamatsu, Tokyo, JP;

Tomokazu Hamada, Tokyo, JP;

Masatoshi Nakayama, Tokyo, JP;

Inventors:

Hifumi Noto, Tokyo, JP;

Kazuhisa Yamauchi, Tokyo, JP;

Yoshihiro Hamamatsu, Tokyo, JP;

Tomokazu Hamada, Tokyo, JP;

Masatoshi Nakayama, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 1/26 (2006.01); H03F 1/30 (2006.01);
U.S. Cl.
CPC ...
Abstract

A linearizer changes a gain characteristic to a valley characteristic in which a gain reduces and then increases. The linearizer includes: a signal path in which an RF signal input terminal an input side bias blocking capacitor, a diode pair, including diodes having opposite polarities to each other, an output side bias blocking capacitor and an RF signal output terminal in series in the stated order; a bias circuit in which a resistor is provided between and a signal path formed between the input side bias blocking capacitor and the diode pair and a bias terminal; an RF short-circuiting capacitor whose one end is connected with the bias circuit between the bias terminal and the resistor and whose other end is grounded; and a DC feed inductor whose one end is connected with the signal path between the diode pair and the output side bias blocking capacitor and whose other end is grounded.


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