The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2009

Filed:

Dec. 23, 2004
Applicants:

Yi-ning Yang, Cupertino, CA (US);

Arthur H. Khu, San Mateo, CA (US);

Jin-feng Chou, Los Altos, CA (US);

Paul T. Nguyen, Fremont, CA (US);

Inventors:

Yi-Ning Yang, Cupertino, CA (US);

Arthur H. Khu, San Mateo, CA (US);

Jin-Feng Chou, Los Altos, CA (US);

Paul T. Nguyen, Fremont, CA (US);

Assignee:

XILINX, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

Various embodiments of the present invention relate to a device for testing an integrated circuit. According to one embodiment, the device comprises a first connector coupled to receive a device under test and a second connector coupled to receive compressed test data by way of test equipment. The device also comprises a decompressor coupled to receive compressed test data, and provided decompressed test data to the device under test. Embodiments implementing two different clocks to improve the speed of testing integrated circuits are also disclosed. Various methods for coupling test signals to a device under test are also disclosed.


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