The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 30, 2009
Filed:
Dec. 29, 2005
William F. Beausoleil, Hopewell Jct, NY (US);
Mitchell G. Poplack, San Jose, CA (US);
Steven T Comfort, Poughkeepsie, NY (US);
Beshara Elmufdi, Sunnyvale, CA (US);
William F. Beausoleil, Hopewell Jct, NY (US);
Mitchell G. Poplack, San Jose, CA (US);
Steven T Comfort, Poughkeepsie, NY (US);
Beshara Elmufdi, Sunnyvale, CA (US);
Quickturn Design Systems, Inc., San Jose, CA (US);
Abstract
The present system and methods are directed to the interconnection of clusters of emulation processors comprising emulation processors in a software-driven hardware design verification system. The processors each output one NBO output signal. The clusters are interconnected by partitioning a common NBO bus into a number of smaller NBO busses, each carrying unique NBO signals but together carrying every NBO. Each of the smaller NBO busses are passed into a series of multiplexers, each dedicated to a particular processor. The multiplexers select a signal for output back to the emulation clusters. The multiplexers that handle these smaller NBO busses are narrower than was previously required, thus reducing the amount of power, interconnect, and area required by the multiplexer array and dedicated interconnect.