The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2009

Filed:

Nov. 03, 2006
Applicant:

John Huie, Scottsdale, AZ (US);

Inventor:

John Huie, Scottsdale, AZ (US);

Assignee:

VNS Portfolio LLC, Cupertino, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/311 (2006.01);
U.S. Cl.
CPC ...
Abstract

A novel a method for determining the internal operation of an integrated circuit (IC) includes measuring electromagnetic (EM) emissions from the integrated circuit chip and analyzing the EM emissions. In a particular method, the EM emissions from the IC are measured using an RF close end probe. In a particular method, the electromagnetic emissions are measured with the IC configured in various ways. In the normal operating mode, the emissions are measured while the IC is provided with power and any external clock signal(s). After measuring the emissions of the IC in normal operating mode, the IC is reconfigured by disabling the external clock signal(s) to the IC and remeasuring the emissions. The external clock signal is disabled by disconnecting the power to the IC, disabling the external clock signal, and then reconnecting power to the IC. In yet a third test mode, the external clock signal is reenabled while power continues to be supplied to the IC. Information about the presence and/or proper functioning of internal clocks of the IC can be determined by analyzing the spectral scan data obtained in one or more of the three test modes.


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