The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7554040 B1

PDF
Full Text
Expired
Date of Patent:
Jun. 30, 2009

Filed:

Jul. 28, 2006
Applicants:

Yoshitada Nakao, Kosai, JP;

Masateru Tsutsumi, Kosai, JP;

Takayuki Fujikawa, Kosai, JP;

Inventors:

Yoshitada Nakao, Kosai, JP;

Masateru Tsutsumi, Kosai, JP;

Takayuki Fujikawa, Kosai, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/16 (2006.01);
U.S. Cl.
CPC ...
Abstract

A printed circuit board suitable for dip soldering of component leads in through holes using lead free solder. The printed circuit board includes a plurality of via holes arranged around each through hole in which a component lead is inserted, whereby solder wicking up into the through hole is enhanced and air entrapment is prevented during the dip soldering operation, and heat fatigue resistance of solder joints is improved.


Find Patent Forward Citations

Nakao, Yoshitada. (2009). Printed circuit board and soldering method and apparatus (U.S. Patent No. 7554040). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7554040

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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