The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2009

Filed:

Jul. 18, 2006
Applicants:

Hee-seog Jeon, Hwaseong-si, KR;

Jeong-uk Han, Suwon-si, KR;

Chang-hun Lee, Suwon-si, KR;

Sung-taeg Kang, Seoul, KR;

Bo-young Seo, Anyang-si, KR;

Hyok-ki Kwon, Yongin-si, KR;

Inventors:

Hee-Seog Jeon, Hwaseong-si, KR;

Jeong-Uk Han, Suwon-si, KR;

Chang-Hun Lee, Suwon-si, KR;

Sung-Taeg Kang, Seoul, KR;

Bo-Young Seo, Anyang-si, KR;

Hyok-Ki Kwon, Yongin-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

A nonvolatile memory cell includes a source region and a drain region which are disposed in a semiconductor substrate and spaced apart from each other, a source selection line and a drain selection line disposed over the semiconductor substrate between the source region and the drain region. The source selection line and the drain selection line are disposed adjacent to the source region and the drain region, respectively. The nonvolatile memory cell further includes a cell gate pattern disposed over the semiconductor substrate between the source selection line and the drain selection line, a first floating impurity region provided in the semiconductor substrate under a gap region between the source selection line and the cell gate pattern and a second floating impurity region provided in the semiconductor substrate under a gap region between the drain selection line and the cell gate pattern. Distances between the cell gate pattern and the selection lines are less than widths of the selection lines.


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