The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 23, 2009

Filed:

Oct. 12, 2001
Applicant:

G. Michael Uhler, Menlo Park, CA (US);

Inventor:

G. Michael Uhler, Menlo Park, CA (US);

Assignee:

MIPS Technologies, Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/24 (2006.01); G06F 13/26 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and apparatus for generating an interrupt vector associated with either core (internal) generated or off-core (external) generated interrupts is provided. The apparatus includes a number of programmable interrupt priority level fields for storing priority levels for the core generated interrupts, and for the externally generated interrupts, if desired. The apparatus further includes a programmable offset register for storing an offset to be used in calculating the interrupt vector. The apparatus further includes a priority encoder that sorts all of the received interrupts, whether on-core or off-core, according to their priority, utilizing the programmed interrupt priority levels. The priority encoder provides an indication of the received interrupt with the highest priority to a vector generator. The vector generator receives the indication, and calculates an interrupt vector utilizing the programmed offset. Use of the priority encoder and vector generator allows a processing system to programmably specify how core generated interrupts are to be prioritized against external interrupts, thereby allowing interrupt vectors to be directly calculated for core generated interrupts.


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