Cmos transceiver with dual current path vco

Abstract

A dual current path voltage controlled oscillator exhibits both the seamless frequency acquisition and uniform VCO gain reduction while preserving an original operating range and phase locked loop characteristics. The present invention provides a quad-channel transceiver comprising a phase locked loop circuit including a voltage controlled oscillator used to generate a clock signal, a FIFO buffer used to store data to be transmitted, a frequency comparator for comparing a reference clock to the generated clock signal from the phase locked loop circuit; and a folded starved inverter circuit contained within the voltage controlled oscillator wherein the folded starved inverter provides two current paths. The dual current paths allow for simultaneous coarse and fine phase tracking. With this low jitter performance and wide operating range, the quad transceiver may be implemented in 0.18-μm CMOS technology, and shows 10bit error rate up to speeds of 3 Gbps.