The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 23, 2009
Filed:
Jul. 30, 2007
Donald Albert Evans, Lancaster, OH (US);
Ross A. Kohler, Allentown, PA (US);
Richard J. Mcpartland, Nazareth, PA (US);
Wayne E. Werner, Coopersburg, PA (US);
Donald Albert Evans, Lancaster, OH (US);
Ross A. Kohler, Allentown, PA (US);
Richard J. McPartland, Nazareth, PA (US);
Wayne E. Werner, Coopersburg, PA (US);
Agere Systems Inc., Allentown, PA (US);
Abstract
A dual-port memory circuit includes a plurality of memory sub-blocks. Each of the memory sub-blocks includes a plurality of single-port memory cells, at least one row line, and at least one local bit line, the row line and the bit line being coupled to the memory cells for selectively accessing the memory cells. The memory circuit further includes at least one global bit line connected to the plurality of memory sub-blocks. The global bit line is time-multiplexed during a given memory cycle such that the global bit line propagates data associated with a first port in the memory circuit during a first portion of the memory cycle, and the global bit line propagates data associated with a second port in the memory circuit during a second portion of the memory cycle.