The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 23, 2009

Filed:

Mar. 27, 2006
Applicants:

Vishnu K. Khemka, Chandler, AZ (US);

Amitava Bose, Tempe, AZ (US);

Todd C. Roggenbauer, Chandler, AZ (US);

Ronghua Zhu, Chandler, AZ (US);

Inventors:

Vishnu K. Khemka, Chandler, AZ (US);

Amitava Bose, Tempe, AZ (US);

Todd C. Roggenbauer, Chandler, AZ (US);

Ronghua Zhu, Chandler, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device may include a semiconductor substrate having a first dopant type. A first semiconductor region within the semiconductor substrate may have a plurality of first and second portions (). The first portions () may have a first thickness, and the second portions () may have a second thickness. The first semiconductor region may have a second dopant type. A plurality of second semiconductor regions () within the semiconductor substrate may each be positioned at least one of directly below and directly above a respective one of the first portions () of the first semiconductor region and laterally between a respective pair of the second portions () of the first semiconductor region. A third semiconductor region () within the semiconductor substrate may have the first dopant type. A gate electrode () may be over at least a portion of the first semiconductor region and at least a portion of the third semiconductor region ().


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