The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2009

Filed:

Jul. 28, 2004
Applicants:

Minoru Takaya, Tokyo, JP;

Hisayuki Abe, Tokyo, JP;

Kei Suzuki, Tokyo, JP;

Kosuke Takano, Tokyo, JP;

Kenichi Kawabata, Tokyo, JP;

Toshikazu Endo, Tokyo, JP;

Inventors:

Minoru Takaya, Tokyo, JP;

Hisayuki Abe, Tokyo, JP;

Kei Suzuki, Tokyo, JP;

Kosuke Takano, Tokyo, JP;

Kenichi Kawabata, Tokyo, JP;

Toshikazu Endo, Tokyo, JP;

Assignee:

TDK Corporation, Tokyo, JP;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
Abstract

A module with embedded semiconductor IC of the present invention includes a first resin layer, a second resin layer, post electrodes passing through the first and second resin layers, and a semiconductor IC mounted as embedded between the first resin layer and the second resin layer. Stud bumps are formed on land electrodes of the semiconductor IC and positioned with respect to the post electrodes. Owing to this positioning of the stud bumps formed on the semiconductor IC with respect to the post electrodes, the planar position of the stud bumps is substantially fixed. As a result, it is possible to use a semiconductor IC having a very narrow electrode pitch of 100 μm or smaller, particularly of around 60 μm.


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