The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2009

Filed:

Sep. 26, 2006
Applicants:

Thomas J Brunschwiler, Thalwil, CH;

Bruno Michel, Adliswil, CH;

Ryan Joseph Linderman, Zurich, CH;

Urs Kloter, Dietikon, CH;

Hugo E Rothuizen, Adliswil, CH;

Inventors:

Thomas J Brunschwiler, Thalwil, CH;

Bruno Michel, Adliswil, CH;

Ryan Joseph Linderman, Zurich, CH;

Urs Kloter, Dietikon, CH;

Hugo E Rothuizen, Adliswil, CH;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 23/12 (2006.01); H05K 7/20 (2006.01);
U.S. Cl.
CPC ...
Abstract

A surface adapting cap with an integrated adapting thermally conductive material on single and multi chip module provides reduced gap tolerance and hence better thermal performance of the semiconductor device which enhances the reliability of the semiconductor device. In one of the embodiments the cap is modified with an integrated, confined, and high thermal adaptive material. The membrane on this system is highly flexible. The cap is preassembled to the chip at a temperature above liquidus below curing temperature of the adaptive material. At this state, a hydrostatic pressure in the material develops due to the compression exerted from the cap to the chip and the confined volume of the buried material. This hydrostatic pressure causes the membrane to deflect and to adapt the warping and tolerances of the chip. Due to the adaptive surface the gap on each position of the chip and from chip to chip is same.


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