The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 09, 2009

Filed:

Mar. 30, 2005
Applicants:

Marcus Culmsee, Wappingers Falls, NY (US);

Hermann Wendt, Poughkeepsie, NY (US);

Lothar Doni, Fishkill, NY (US);

Inventors:

Marcus Culmsee, Wappingers Falls, NY (US);

Hermann Wendt, Poughkeepsie, NY (US);

Lothar Doni, Fishkill, NY (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/336 (2006.01); H01L 21/3205 (2006.01);
U.S. Cl.
CPC ...
Abstract

To form a semiconductor device, a silicon (e.g., polysilicon) gate layer is formed over a gate dielectric and a sacrificial layer (preferably titanium nitride) is formed over the silicon gate layer. The silicon gate layer and the sacrificial layer are patterned to form a gate structure. A spacer, such as an oxide sidewall spacer and a nitride sidewall spacer, is formed adjacent the sidewall of the gate structure. The semiconductor body is then doped to form a source region and a drain region that are self-aligned to the spacers. The sacrificial layer can then be removed selectively with respect to the oxide sidewall spacer, the nitride sidewall spacer and the silicon gate. A metal layer (e.g., nickel) is formed over the source region, the drain region and the silicon gate and reacted with these regions to form a silicided source contact, a silicided drain contact and a silicided gate.


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