The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2009

Filed:

Aug. 01, 2003
Applicants:

Gregg Bernard Lesartr, Ft. Collins, CO (US);

Douglas Shelborn Stirrett, Ft. Collins, CO (US);

Inventors:

Gregg Bernard Lesartr, Ft. Collins, CO (US);

Douglas Shelborn Stirrett, Ft. Collins, CO (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/46 (2006.01); G06F 9/26 (2006.01); G06F 9/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

A processor purging system comprising a translation lookaside buffer (TLB) having a plurality of translation pairs, at least one memory cache, and logic configured to detect whether at least one of the translation pairs corresponds to a purge signal. The logic is further configured to assert a purge detection signal indicative of whether at least one translation pair corresponds to the purge signal and to determine, based upon the purge detection signal, whether to search the memory cache for a translation pair corresponding to the purge signal.


Find Patent Forward Citations

Lesartr, Gregg. (2009). Processor purging system and method (U.S. Patent No. 7543291). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7543291

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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